1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device having a color filter on thin film transistor structure and a method of fabricating the same. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for increasing an aperture ratio and simplifying the fabrication process.
2. Discussion of the Related Art
In general, since flat panel display devices are thin, light weight, and have a low power consumption, they have been used for portable display devices. Among the various types of flat panel display devices, liquid crystal display (LCD) devices are widely used for laptop computers and desktop computer monitors because of their superiority in resolution, color image display, and display quality.
Optical anisotropy and polarization characteristics of liquid crystal molecules are utilized to generate desirable images. Liquid crystal molecules have specific alignment directions that result from their own peculiar characteristics. The specific alignment can be modified by electric fields that are applied upon the liquid crystal molecules. In other words, the electric fields applied upon the liquid crystal molecules can change the alignment of the liquid crystal molecules. Due to the optical anisotropy, the incident light is refracted according to the alignment of the liquid crystal molecules.
Specifically, the LCD devices include upper and lower substrates having electrodes that are spaced apart and face into each other, and a liquid crystal material is interposed therebetween. Accordingly, when a voltage is applied to the liquid crystal material through the electrodes of each substrate, an alignment direction of the liquid crystal molecules is changed in accordance with the applied voltage, thereby displaying images. By controlling the applied voltage, the LCD device provides various light transmittances to display image data.
The liquid crystal display (LCD) devices are widely applied in office automation (OA) and video equipment due to their characteristics such as light weight, slim design, and low power consumption. Among different types of LCD devices, active matrix LCDs (AM-LCDs) having thin film transistors and pixel electrodes arranged in a matrix form provide high resolution and superiority in displaying moving images. A typical LCD panel has an upper substrate, a lower substrate, and a liquid crystal layer interposed therebetween. The upper substrate (referred to as a color filter substrate) includes a common electrode and color filters. The lower substrate (referred to as an array substrate) includes thin film transistors (TFT's) as switching elements and pixel electrodes.
As previously described, the operation of an LCD device is based on the principle that the alignment direction of liquid crystal molecules varies with applied electric fields between the common electrode and the pixel electrode. Accordingly, the liquid crystal molecules function as an optical modulation element having variable optical characteristics that depend upon the polarity of the applied voltage.
FIG. 1 is an expanded perspective view illustrating a related art active matrix liquid crystal display device. As shown in FIG. 1, the LCD device 11 includes an upper substrate 5 (referred to as a color filter substrate) and a lower substrate 22 (referred to as an array substrate) having a liquid crystal layer 14 interposed therebetween. On the upper substrate 5, a black matrix 6 and a color filter layer 8 are formed in an array matrix including a plurality of red (R), green (G), and blue (B) color filters surrounded by corresponding portions of the black matrix 6. Additionally, a common electrode 18 is formed on the upper substrate 5 and covers the color filter layer 8 and the black matrix 6.
On the lower substrate 22, a plurality of thin film transistors T are formed in a shape of an array matrix corresponding to the color filter layer 8. A plurality of gate lines 13 and data lines 15 perpendicularly cross one another such that each TFT T is located adjacent to each intersection of the gate lines 13 and the data lines 15. Furthermore, a plurality of pixel electrodes 17 are formed on a pixel region P defined by the gate lines 13 and the data lines 15 of the lower substrate 22. The pixel electrode 17 is formed of a transparent conductive material having high transmissivity, such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO).
Still in FIG. 1, a storage capacitor CST is disposed to correspond to each pixel P and connected in parallel to each pixel electrode 17. The storage capacitor CST is comprised of a portion of the gate line 13 as a first capacitor electrode, a storage metal layer 30 as a second capacitor electrode, and an interposed insulator (shown as reference numeral 16 of FIG. 2). Since the storage metal layer 30 is connected to the pixel electrode 17 through a contact hole, the storage capacitor CST electrically contacts the pixel electrode 17.
In the related art LCD device shown in FIG. 1, a scanning signal is applied to the gate electrode of the thin film transistor T through the gate line 13, and a data signal is applied to the source electrode of the thin film transistor T through the data line 15. As a result, the liquid crystal molecules of the liquid crystal material layer 14 are aligned and arranged by the operation of the thin film transistor T, and the incident light passing through the liquid crystal layer 14 is controlled to display an image. However, since the pixel and common electrodes 17 and 18 are positioned on the upper and lower substrates 5 and 22, respectively, the electric fields induced between the upper and lower substrates 5 and 22 are perpendicular to the surfaces of the upper and lower substrates 5 and 22.
When fabricating the LCD device 11 of FIG. 1, the upper substrate 5 is aligned with and attached to the lower substrate 22. In this process, the upper substrate 5 may be misaligned with respect to the lower substrate 22 and a light leakage may occur in the completed LCD device 11 due to an error margin in attaching the upper and lower substrates 5 and 22.
FIG. 2 is a schematic cross-sectional view taken along line II—II of FIG. 1 and illustrates a pixel of the related art liquid crystal display device.
As shown in FIG. 2, the related art LCD device includes the upper substrate 5, the lower substrate 22, and the liquid crystal layer 14. The upper and lower substrates 5 and 22 are spaced apart from each other, and the liquid crystal layer 14 is interposed therebetween. The upper and lower substrates 5 and 22 are often referred to as an array substrate and a color filter substrate, respectively, because the color filter layer 8 is formed upon the upper substrate and a plurality of array elements are formed on the lower substrate 22.
In FIG. 2, the thin film transistor T is formed on the front surface of the lower substrate 22. The thin film transistor T includes a gate electrode 32, an active layer 34, a source electrode 36, and a drain electrode 38. Between the gate electrode 32 and the active layer 34, a gate insulation layer 16 is interposed to protect the gate electrode 32 and the gate line 13. As shown in FIG. 1, the gate electrode 32 extends from the gate line 13 and the source electrode 36 extends from the data line 15. All of the gate, source, and drain electrodes 32, 36, and 38 are formed of a metallic material while the active layer 34 is formed of silicon. A passivation layer 40 is formed on the thin film transistor T for protection. In the pixel region P, the pixel electrode 17 formed of a transparent conductive material is disposed on the passivation layer 40 and contacts the drain electrode 38 and the storage metal layer 30.
Meanwhile, as mentioned above, the gate electrode 13 acts as a first electrode of the storage capacitor CST and the storage metal layer 30 acts as a second electrode of the storage capacitor CST. Thus, the gate electrode 13 and the storage metal layer 30 constitute the storage capacitor CST with the interposed gate insulation layer 16.
Still referring to FIG. 2, the upper substrate 5 is spaced apart from the lower substrate 22 over the thin film transistor T. On the rear surface of the upper substrate 5, a black matrix 6 is disposed in a position corresponding to the thin film transistor T and the gate line 13. The black matrix 6 is formed on the entire surface of the upper substrate 5 and has openings corresponding to the pixel electrode 17 of the lower substrate 22, as shown in FIG. 1. The black matrix 6 prevents a light leakage in the LCD panel except for the portion for the pixel electrode 17. The black matrix 6 protects the thin film transistor T from the light such that the black matrix 6 prevents generation of a photo-current in the thin film transistor T. The color filter layer 8 is formed on the rear surface of the upper substrate 5 to cover the black matrix 6. Each of the color filters 8 has one of the red, green, and blue colors and corresponds to one pixel region P where the pixel electrode 17 is located. A common electrode 18 formed of a transparent conductive material is disposed on the color filter layer 8 over the upper substrate 5.
In the related art LCD panel mentioned above, the pixel electrode 17 has a one-to-one correspondence with one of the color filters. Furthermore, in order to prevent a cross-talk between the pixel electrode 17 and the gate and data lines 13 and 15, the pixel electrode 17 is spaced apart from the data line 15 by the distance A and from the gate line 13 by the distance B, as shown in FIG. 2. The open spaces A and B between the pixel electrode 17 and the data and gate line 15 and 13 cause a malfunction such as a light leakage in the LCD device. Namely, the light leakage mainly occurs in the open spaces A and B so that the black matrix 6 formed on the upper substrate 5 should cover the open spaces A and B. However, when the upper substrate 5 is arranged with the lower substrate 22 or vice versa, a misalignment may occur between the upper substrate 5 and the lower substrate 22. Therefore, the black matrix 6 is extended to completely cover the open spaces A and B. That is, the black matrix 6 is designed to provide an aligning margin to prevent a light leakage. However, in the case of extending the black matrix, an aperture ratio of a liquid crystal panel is reduced as much as the aligning margin of the black matrix 6. Moreover, if there are errors in the aligning margin of the black matrix 6, a light leakage still occurs in the open spaces A and B, and deteriorates the image quality of an LCD device.
To overcome the above-mentioned problem, the lower substrate of the liquid crystal display device has been researched to have a top gate type thin film transistors. FIG. 3 is a cross-sectional view illustrating a pixel of an array substrate including a top gate type thin film transistor according to the related art.
As shown in FIG. 3, a buffer layer is disposed on a transparent substrate 1. A semiconductor layer 54 and a first capacitor electrode 56 are formed on the buffer layer. The semiconductor layer 54 and the first capacitor electrode 56 are formed of polycrystalline silicon. The semiconductor layer 54 is divided into the active region C, the source region D, and the drain region E, wherein the source region D and the drain region E are doped by a dopant, such as p-type or n-type ions. Further, the first capacitor electrode 56 is a region where the dopant (p-type or n-type ions) is applied. A gate insulation layer 58 is then disposed on the buffer layer to cover the semiconductor layer 54 and the first capacitor electrode 56.
A gate electrode 60 and a second capacitor electrode 62 are formed on the gate insulation layer 58. The gate electrode 60 corresponds to the active region C of the semiconductor layer 54, and the second capacitor electrode 62 corresponds to the first capacitor electrode 56. The first and second capacitor electrodes 56 and 62 constitute a storage capacitor CST with the gate insulation layer 58 interposed therebetween.
An interlayer insulator 64 is formed on the gate insulation layer 58 while covering the gate electrode 60 and the second capacitor electrode 62. Both the interlayer insulator 64 and the gate insulation layer 58 have first, second, and third contact holes 66a, 66b, and 66c. The first contact hole 66a exposes the source region D of the semiconductor layer 54, the second contact hole 66b exposes the drain region E of the semiconductor layer 54, and the third contact hole 66c exposes the first capacitor electrode 56.
On the interlayer insulator 64, source and drain electrodes 68 and 70 are formed to contact the source and drain regions D and E, respectively. Further, a data line 69 connected to the source electrode 68 is also disposed on the interlayer insulator 64. The source electrode 68 extends from the data line 69 and contacts the source region D of the semiconductor layer 54 through the first contact hole 66a. The drain electrode 70 is spaced apart from and faces into the source electrode 68 across the gate electrode 60, and contacts the drain region E of the semiconductor layer 54 through the second contact hole 66b. 
Accordingly, a top gate type thin film transistor T is formed over the transparent substrate 50. Additionally, an auxiliary capacitor electrode 72 is formed on the interlayer insulator 64 over the storage capacitor CST SO that the auxiliary capacitor electrode 72 contacts the first capacitor electrode 56 through the third contact hole 66c. A passivation layer 78, which is covering the top gate type thin film transistor T and the storage capacitor CST, is disposed on the interlayer insulator 64. The passivation layer 78 has a drain contact hole 74 exposing the drain electrode 70 and a storage contact hole 76 exposing the auxiliary capacitor electrode 72. A pixel electrode 80 is formed on the passivation layer while contacting both the drain electrode 70 through the drain contact hole 74 and the auxiliary capacitor electrode 72 through the storage contact hole 76.
When using this array substrate of FIG. 3 having the top gate type thin film transistor T, the upper substrate corresponding to the array substrate still needs a black matrix to prevent a light leakage. Further, when the array substrate and the upper substrate are attached to each other, the two substrates may still be misaligned so that a light leakage cannot be improved and an aperture ratio still decreases. Moreover, since the color filters and the black matrix are formed on the upper substrate and the lower and upper substrates are aligned and attached to each other, the manufacturing process becomes complicated.